Curvature-based edge bump quantification

ABSTRACT

Evaluating irregularities in surfaces of objects such as semiconductor wafers using a thickness profile of a surface section and analyzing the profile to obtain information of an irregularity start position, magnitude, and span along with surface slope and height information.

CROSS REFERENCE TO RELATED APPLICATIONS

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STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH OR DEVELOPMENT

N/A

BACKGROUND OF THE INVENTION

The present invention relates to the measurement of surface topology of semiconductor wafers prior to their fabrication by semiconductor manufacturers into various micro circuits and other similar devices.

Semiconductor wafers are expensive real estate in that the manufacturers of semiconductor products need to know the quality of the surface area of the wafers, which can be as large as 300 cm across, before committing time, equipment and materials to process them into finished semiconductor products. If there is a sufficient perturbation in the surface profile of a portion of a semiconductor which could prevent its being processed into a finished product, that information needs to be known before the manufacturer proceeds so that that portion can be eliminated from processing. This problem is particularly severe in the edge areas of semiconductors where there tends to be a slope roll-off so that traditional thickness measurements by themselves are unlikely to reveal the presence of all or many bumps that affect the processing of finished semiconductor products.

Current processing and sensing techniques for a wafer surface profile are inadequate to accurately reveal the presence of a bump which exists as a significant variation from the local surface profile. Present techniques use a proximity probe which may, in fact, be a laser interferometer, to measure thickness of a wafer. This information is presently processed to provide a curvature profile by taking the second derivative of the curve representing data obtained by current probing technologies.

BRIEF SUMMARY OF THE INVENTION

The present invention aims at providing additional information about the bump (or depression anomaly) characteristics and in particular information about its start point radially from the semiconductor wafer central axis, the span of the bump to its maximum height and the actual height or departure from local surface level. That level is typically tilted with respect to a plane perpendicular to the wafer axis. Current semiconductor manufacturers need this additional information in order to accurately assess the suitability of all regions of a semiconductor wafer for processing purposes. The fact that a wafer may slope or roll off towards its edge does not necessarily disqualify it for purposes of producing finished semiconductor processes but a departure from the local plane of curvature could be a significant impediment.

The present invention provides additional signal processing which allows or provides the values of start point, peak point and distance therebetween which are essential to industry users. This data is obtained from the profile or second derivative curve by a process of integration of the profile value from the point where a rise in the local plane is first detected to outwardly extending radial points. A single integral will provide slope information about the wafer surface as a function of radius. The invention further provides for a double integral of the profile of curvature which will, in fact, provide surface normalized height information showing bumps and other perturbations above the local surface plane. Further, processing allows the maximum in the height information to be determined which can be used by manufacturers to judge the severity of the local departure from norm or bump.

BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWINGS

These and other features of the present invention are illustrated in the figure, and accompanying detailed description wherein:

FIG. 1 illustrates a wafer surface condition evaluation system with which the invention is operative and which provides data reflecting profiles of the wafer front surface, back surface, or thickness;

FIG. 2 illustrates data acquisition points on a semiconductor wafer surface as practiced in the invention;

FIG. 3 illustrates a typical profile obtained from utilization of the measuring apparatus of FIG. 1;

FIG. 4 illustrates a typical thickness profile;

FIG. 5 illustrates a corresponding ZDD profile as practiced in the invention;

FIG. 6 illustrates processing of the data of FIG. 5 according to the present invention;

FIG. 7 illustrates further processing of the data of FIG. 5 according to the invention;

FIG. 8 illustrates graphically wafer anomaly data from processing according to the invention;

FIG. 9 illustrates the difference in detected surface anomalies between thickness data and anomaly measurements according to the invention.

DETAILED DESCRIPTION OF THE INVENTION

The present invention operates in the environment of testing of a semiconductor wafer 10 for surface characteristics which is typically accomplished by spinning the wafer about its center on an axis 12 with a sensor or wafer measurement tool 14 of a type known in the art to measure distance to the wafer 10. The sensor output is processed by a system 20 in conjunction with a microprocessor 22 to develop a profile, such as thickness or front/back surface distance, of the wafer 10 as it spins. Output information representing thickness or other parameters can be provided to a user interface 24 for use by I/O devices 26.

In FIG. 2, a top view of the wafer 10 is shown illustrating part of typical processing of the thickness information provided by the sensor 14 and associated electronics. In particular, in a sector 30 the sensor head 14 makes a plurality of measurements 32, typically of thickness. The sector 30 may span a distance of 5° or more along the edge 34 of the wafer 10. The sector 30 typically includes data taken within that angle over a distance between and 1 and 5-10 mm from the edge 34. In typical application, the data in the segment 30 is averaged so as to provide thickness information along a radius vector 36. While the invention is particularly useful at an edge, it may also be used over the whole wafer or other parts thereof.

Typical processing of information from the sensor 14, as described with respect to FIG. 2, will yield a profile curve 40 in FIG. 3, in this case a thickness profile. Such a profile 40 typically has a plurality of small surface unevenness. A larger anomaly would be classified as a bump 44, or possibly a void, or inverted bump. It is with information about such anomalies 44 that the invention is concerned. The profile 40 of thickness illustrates a gradual roll-off or reduction in thickness illustrated in FIG. 3, as the edge 34 of the wafer is reached.

FIG. 4 illustrates an expanded view of a thickness profile in the range of 140 to 150 mm from wafer center as a curve 60. When an anomaly 62 such as a bump is present, the change in the slope (2^(nd) derivative) of curve 60 will go from negative to positive. This point marks a bump start radius (BSR). Second derivative processing converts the curve 60 of FIG. 4 to a ZDD profile 70 in FIG. 5. The profile 20 is typically referred to as the ZDD profile or metric. See Document No. 4209 of Semiconductor Equipment and Materials International, 3081 Zanker Road, San Jose, Calif. 95134-2127. That document bears a publication date of Nov. 6, 2006 and is incorporated herein by reference.

While both curves 60 and 70 illustrate the presence of respective bumps 62 and 72, the start position of the bump in FIG. 4 is rather indeterminate from mere thickness measurement given the roll-off nature of the wafer at its edge. In FIG. 5 however, because of the second derivative properties, the beginning of the bump (BSR), or void, is identifiable as the zero crossing in the profile curve, or second derivative curve, 70.

The demands of modern semiconductor processing and the cost of semiconductor real estate demands even better information about bumps or other anomalies be provided to the semiconductor manufacturer from testing of the raw semiconductor wafers. In order to accomplish that, the processing of FIGS. 6 and 7, typically by processor 22, which has provided the curve 70 of FIG. 5, is employed.

The processor 22 acts on the profile data of FIG. 5 to perform the integration of FIG. 6 in which r represents the radius as shown in FIG. 1 and is the variable of integration. The integration is from the bump start radius (BSR) out to the actual radius r. This provides a slope database. Height information is found using the integration of FIG. 7 in which a double integral is formed first from BSR to γ using the integration variable p followed by the integral from BSR to radius r using variable γ. The function C represents the curvature or ZDD profile 70 of FIG. 5. From the integration h_(b), a function of radius r, the bump peak radius (BPR) is calculated as the radius of the peak value bump height, of the double integral. A void would be a minimum. The bump height is calculated as the peak value of the distance between that point and BSR is calculated as the radial span of the bump or anomaly. This information calculated by processor 22 provides the bump start point, the bump height and the radial distance between them, valuable information for the semiconductor manufacturers.

FIG. 8 illustrates these effects of the processing of the invention. A curve 80 corresponds to the profile 70 of FIG. 5. Curve 82 illustrates the results of the first integral processing of FIG. 6 to provide the slope S_(b) information. The curve 84 illustrates the h_(b) bump height information from the double integral of FIG. 7. This information clearly allows the calculation of the bump peak radius or maximum height (BPR) in curve 84. The span is the distance between BSR and BPR and the height as given from the processor 22 evaluation of the maximum value of curve 84 using known technologies.

The wafer tends to slope downward at the edges so that simple thickness information cannot readily be used to identify a variation in height relative to the near value of the slope throughout the edge region. This is illustrated in FIG. 9 which shows a gap 94 in minimum height between the thickness curve 92 and the bump height curve 92.

The above description is illustrative only and the inventions scope is provided by the following claims. 

1. A method for characterizing properties of surface irregularities of an object comprising; processing surface information to provide a ZDD profile of the surface of the object; converting the ZDD profile to anomaly information.
 2. The method of claim 1 wherein said converting step includes the step of providing local height information.
 3. The method of claim 1 or 2 wherein said height information includes information on positive and negative height irregularities.
 4. The method of claim 1, 2 or 3 further including the step of providing an indication of a start position of said irregularity.
 5. The method of claim 1, 2, 3 or 4 including the step of providing an indication of a span of said irregularity.
 6. Apparatus for characterizing properties of surface irregularities of an object comprising; means processing surface information to provide a ZDD profile of the surface of the object; means for converting the ZDD profile to anomaly information.
 7. The apparatus of claim 6 wherein said converting means provides local height information.
 8. The apparatus of claim 6 or 7 wherein said height information includes information on positive and negative height irregularities.
 9. The apparatus of claim 6, 7 or 8 further including means for providing an indication of a start position of said irregularity.
 10. The apparatus of claim 6, 7, 8, or 9 including means for providing an indication of a span of said irregularity.
 11. A system for evaluating surface irregularities in semiconductor wafers comprising: means for receiving a surface profile of some or all of a wafer; and means for analyzing said profile to obtain information of one or more of an irregularity start position, irregularity magnitude, and irregularity span.
 12. The system of claim 11 wherein said surface profile includes a ZDD profile.
 13. The system of claim 11 or 12 wherein said profile includes wafer edge information.
 14. The system of any one of claims 11-13 wherein said profile includes a profile within a section of said wafer averaging thickness information along a line of said section.
 15. The system of any one of claims 11-14 wherein said analyzing means includes means for providing slope information.
 16. The system of any one of claims 11-15 wherein said analyzing means provides positive or negative height information along said wafer.
 17. The system of any one of claims 11-16 wherein said analyzing means provides an integral of said profile information from an irregularity start point to a maximum point along the profile direction to obtain slope information and a double integral of said profile between said start and maximum points to obtain said height information.
 18. The system of any one of previous claims 1-17 wherein said profile is a curvature profile.
 19. The system of any one of previous claims 1-18 wherein said profile represents a second derivative of wafer thickness information.
 20. The system of any one of previous claims 1-19 including means for sensing wafer thickness; and means for providing said profile from wafer thickness information.
 21. The system of any one of claims 18, 19 and 20 wherein said start position is defined by a point where said profile changes from a negative to a positive value or vice versa.
 22. A system for providing semiconductor wafer edge bump information comprising: A sensor for sensing the thickness of a semiconductor wafer in an edge region thereof; means for processing sensor thickness to provide bump start, bump magnitude and bump span information.
 23. The system of claim 22 wherein said processing means provides bump slope and bump height information.
 24. A method for evaluating surface irregularities in semiconductor wafers comprising the steps of: receiving a surface profile of some or all of a wafer; and analyzing said profile to obtain information of one or more of irregularity start position, irregularity magnitude, and irregularity span.
 25. The method of claim 24 wherein said profile includes a ZDD profile.
 26. The method of claim 24 or 25 wherein said profile includes wafer edge information.
 27. The method of any one of claims 24-26 wherein said profile includes a profile within a section of said wafer averaging thickness along a line of said section.
 28. The method of any one of claims 24-27 wherein said analyzing step includes providing slope information.
 29. The method of any one of previous claims 24-28 wherein said analyzing step provides positive or negative height information along said wafer.
 30. The method of any one of previous claims 24-29 wherein said analyzing step includes integration of said profile information from a start point to a maximum point along the profile direction to obtain slope information and a double integration of said profile between said start and maximum points to obtain said height information.
 31. The method of any one of previous claims 24-30 wherein said profile is a curvature profile.
 32. The method of any one of previous claims 24-31 wherein said profile represents a second derivative of wafer thickness information.
 33. The method of any one of previous claims 24-32 including the steps of: sensing wafer thickness; and providing said profile from wafer thickness.
 34. The method of any one of claims 31, 32 and 33 including the step of determining said start as a point where said profile changes from a negative to a positive value or vice versa.
 35. A method for providing semiconductor wafer edge bump information comprising the steps of: sensing thickness of a semiconductor wafer in an edge region thereof; processing sensor thickness to provide bump start, bump magnitude and bump span information.
 36. The method of claim 35 wherein said processing step provides bump slope and bump height information. 